In general, two kinds of MOS semiconductor devices (an integrated circuit provided with MOS semiconductors) are known, that is a complementary MOS semiconductor device (hereinafter referred to as a C-MOS device) and a E/D type p-channel MOS semiconductor device (hereinafter referred to as an E/D p-MOS device). In the C-MOS device, "0" propagation delay time t.sub.pdo and "1" propagation delay time t.sub.pd1 are shown respectively by the following expressions: EQU t.sub.pdo .varies.(.beta..sub.N /2) (V.sub.DD - V.sub.TN).sup.2 and t.sub.pd1 .varies.(.beta..sub.p /2) (V.sub.DD - V.sub.TP).sup.2
where V.sub.TN and V.sub.TP are threshold voltages of a n-channel MOS transistor and a p-channel MOS transistor respectively, and .beta..sub.N and .beta..sub.p are size parameters represented by the following equations. ##EQU1## WHERE .mu..sub.N, .mu..sub.p are carrier mobilities of n-channel MOS transistor and p-channel MOS transistor, respectively, W.sub.N /L.sub.N, W.sub.p /L.sub.p are channel width-channel length ratio of n-channel MOS transistor and that of p-channel MOS transistor, respectively, .epsilon..sub.ox is gate oxide layer inductivity, and t.sub.ox is thickness of the gate oxide layer.
Thus, the propagation delay time of the C-MOS device depends on the fluctuation of power source voltage V.sub.DD, which is a defect of the C-MOS device.
On the other hand, "1" propagation delay time of the E/D p-MOS device is shown by the following equation (2). ##EQU2## where C = whole output capacity of E/D p-MOS device,
V.sub.TD = negative threshold voltage of the driving MOS transistor, PA1 V.sub.TL = threshold voltage of the load MOS transistor.
"0" propagation delay time of the E/D p-MOS device t.sub.pdo may be negligible since it is sufficiently small compared with the "1" propagation delay time t.sub.pd1.
It is noted that the propagation delay time t.sub.pd1 of the E/D p-MOS device does not depend on power source voltage, but depends on threshold voltage. If a change arises in the quality of the gate oxide layer Q.sub.ss by the amount of .DELTA.Q.sub.ss during a manufacturing process, a change arises in the threshold voltages V.sub.TD and V.sub.TL by the amount of (t.sub.ox /.epsilon..sub.ox).DELTA.Q.sub.ss, whereby the threshold voltage V.sub.TD and V.sub.TL change to V.sub.TD + (t.sub.ox /.epsilon..sub.ox).DELTA.Q.sub.ss and V.sub.TL - (t.sub.ox /.epsilon..sub.ox).DELTA.Q.sub.ss respectively. Substitution of these values into equation (2) gives the following equation (3): ##EQU3##
The equation (3) shows that the "1" propagation delay time of the E/D p-MOS device changes greatly in accordance with the change .DELTA.Q.sub.ss, that is, the "1" propagation delay time t.sub.pd1 of the E/D p-MOS device depends on the quality of the gate oxide layer, which is a defect of the E/D p-MOS device.